JOHN v. LATTICE SEMICONDUCTOR CORP., 5:12-cv-04384-PSG. (2014)
Court: District Court, N.D. California
Number: infdco20140421618
Visitors: 9
Filed: Apr. 17, 2014
Latest Update: Apr. 17, 2014
Summary: CLAIM CONSTRUCTION ORDER PAUL S. GREWAL, Magistrate Judge. In this patent infringement suit, Lizy K. John. alleges that Lattice Semiconductor Corp., infringes U.S. Patent No. 5,867,422. The court held a tutorial and claim construction hearing. Having carefully considered the parties' respective arguments, the court construes the disputed terms as follows: CLAIM TERM CONSTRUCTION "paired demultiplexers" "A combination of two demul
Summary: CLAIM CONSTRUCTION ORDER PAUL S. GREWAL, Magistrate Judge. In this patent infringement suit, Lizy K. John. alleges that Lattice Semiconductor Corp., infringes U.S. Patent No. 5,867,422. The court held a tutorial and claim construction hearing. Having carefully considered the parties' respective arguments, the court construes the disputed terms as follows: CLAIM TERM CONSTRUCTION "paired demultiplexers" "A combination of two demult..
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CLAIM CONSTRUCTION ORDER
PAUL S. GREWAL, Magistrate Judge.
In this patent infringement suit, Lizy K. John. alleges that Lattice Semiconductor Corp., infringes U.S. Patent No. 5,867,422. The court held a tutorial and claim construction hearing. Having carefully considered the parties' respective arguments, the court construes the disputed terms as follows:
CLAIM TERM CONSTRUCTION
"paired demultiplexers" "A combination of two
demultiplexers that share the same
Claims 2, 7 control inputs"
"column decoder" "A circuit that activates one or
more columns of memory within a
Claims 2, 7 memory array for input or output
based on column address inputs
connected to it"
"programmable address decoder" "A programmable circuit that
activates memory within a
memory array for input or output
Claims 2, 7 based on address inputs connected
to it"
"paired multiplexer" "A combination of two
multiplexers that share the same
control inputs"
Claims 11, 15
"programmable interconnect" "A programmable circuit that
transmits data for input or output"
Claims 3, 11, 12, 18, 19
"with one data input of each of said [paired The court will provide any
demultiplexers/paired multiplexers] being necessary construction as part of
respectively connected to four column its order on Lattice's pending
address lines" summary judgment motion on
indefiniteness.1
Claims 2, 7, 11, 15
"mode control lines" "Lines that specify the width of
the memory"
Claims 2, 3, 7, 11, 12, 14, 15, 16, 19
"the other data input of each of said [paired The court will provide any
demultiplexers/paired multiplexers] being necessary construction as part of
respectively connected to the complement its order on Lattice's pending
of said column address lines" summary judgment motion on
indefiniteness.2
Claims 2, 7, 11, 15
"switches" "Devices for making, breaking or
changing the electric connection of
a circuit"
Claims 3, 4, 6, 12, 16, 20
"control inputs of a plurality of [paired "The control inputs that are shared
demultiplexers/paired multiplexers]" between pairs of
[demultiplexers/multiplexers]"
Claims 2, 11, 12, 15
The parties should rest assured that the court arrived at these constructions with a full appreciation of not only the relevant intrinsic and extrinsic evidence, but also the Federal Circuit's teachings in Phillips v. AWH Corp.3 and its progeny. So that the parties may pursue whatever recourse they believe is necessary, an opinion setting forth the court's complete reasoning and analysis will issue before entry of any judgment.
IT IS SO ORDERED.
FootNotes
1. See Docket No. 99.
2. See id.
3. 415 F.3d 1303, 1312-15 (Fed. Cir. 2005).
Source: Leagle
